A High-Speed Two-Parallel Radix-24 FFT/IFFT Processor for MB-OFDM UWB Systems

This paper presents a novel high-speed, low-complexity two-parallel 128-point radix-24 FFT/IFFT processor for MB-OFDM ultrawideband (UWB) systems. The proposed high-speed, low-complexity FFT architecture can provide a higher throughput rate and low hardware complexity by using a two-parallel data-path scheme and a single-path delayfeedback (SDF) structure. The radix-24 FFT algorithm is also realized in our processor to reduce the number of complex multiplications. The proposed FFT/IFFT processor has been designed and implemented with 0.18μm CMOS technology in a supply voltage of 1.8 V. The proposed twoparallel FFT/IFFT processor has a throughput rate of up to 900 Msample/s at 450 MHz while requiring much smaller hardware complexity and low power consumption. key words: Fast Fourier transform (FFT), radix-24, SDF, multiband orthogonal frequency-division multiplexing (MB-OFDM), ultrawideband (UWB)